Work Profile:

We are hiring a member of the R&D team in charge of the design of very high-speed electrical connectivity working with ASIC and PCB design teams. Special focus on signal integrity, power integrity and EMI/EMS aspects of the signal transmission. Knowledge and experience on electromagnetics simulations and RF design and testing. Application to PCB design, ICs substrates and packages, wire bonding, etc. EMI/EMS testing and pre-compliance testing using the pre-compliance lab at KDPOF office.

The systems that need to be developed in collaboration with the R&D team include:

  • Opto-electronics Multigigabit Ethernet PHYs (e.g. substrate, package, wire bonding)
  • PIC test PCBs:
    • IC bring-up test PCBs,
    • IC PVT characterization tests PCBs
    • IC ATE PCBs
    • IC qualification PCBs (HTOL, HTB, ESD, etc)
  • IC evaluation boards and reference designs in collaboration with FAE and customer support,
  • The systems are wideband, covering frequencies from tens of kHz to tens of GHz

Required Skills:

  • Degree in Electrical and Electronic Engineering or equivalent
  • Solid understanding of electromagnetic theory applied to RF design and testing as well as EMC design and testing
  • Experience in RF design
  • Experience in EM simulation with Keysight ADS and EMPRO
  • Experience in PCB design, focused on high speed links
  • Working knowledge of analog and digital electronics, including details such as component resonances, power devices switching behavior, leakage reactance, plane resonances, and effects of dielectric constant variability, etc.
  • Experience with RF test equipment, use, calibration and interpretation of results (spectrum analyzers, network analyzers, oscilloscopes, signal generators, antennas, coupling clamps, field probes, etc.)
  • Basic knowledge in Matlab is welcome
  • Fluent written and verbal English communication skill is a must: all internal documentation is written in English

Desired Attitude:

  • Continuous search for technical excellence
  • Passion for learning from experience
  • Critical and constructive attitude
  • Capability to accept system design responsibilities. Design: in a broad sense, from the design to the validation in the laboratory and iteration
  • Proactive (problem solving) attitude,
  • Team membership attitude

Others:

  • The role is in Madrid (Tres Cantos)
  • The position reports to the ASIC Manager
  • The role works with all our product portfolios
  • Competitive salary to negotiate according to the candidate’s experience
  • Total employee health insurance and partial spouse and child insurance by KDPOF if applicable.

KDPOF, a leading fabless company in the design of ICs for Gigabit communication over POF, is looking for a Senior Mixed-Signal IC Design Engineer to grow his AMS team. As a member of the mixed-signal design team in the R&D department of the company, you will be a key part in the definition, design and development of the future products of the company. As a senior Mixed-Signal IC Design Engineer, you will be responsible of the following tasks:

  • Specification of the analog and mixed signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics…).
  • Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in nanometric CMOS processes. It means been involved in the full AMS design flow: schematic, layout and full verification.
  • Definition of layout guidelines for layout engineers and review of their work.
  • Collaboration with the test engineers for the test of the fabricated ICs. Review and analysis of lab characterization data, for validation and correlation improvement with simulation results.
  • Cooperation with the rest of the team to define the characterization tests for the circuits in which the analog and mixed-signal blocks are integrated.
  • Cooperation with the system-level engineers for the generation of models of analog and mixed-signal blocks for its use at system-level evaluation.
  • Assist on the integration of the complete analog subsystem to be used in complex mixed-signal design with integrated digital logic. This will include mixed-signal verification with the digital processing.
  • Research on new architectures and efficient solutions for the future products of the company and generation of new patents.
  • Internal meeting presentation and documentation of the developed work

Requirements

  • Degree/Master/PhD in Electronic Engineering
  • At least 5 years of experience in similar tasks
  • Experience in delivering successful design in silicon: product definition, characterization, qualification and productization
  • Experience on designing full-custom analog IP blocks in sub-nanometric CMOS technology (65nm or below), as well as with analog and mixed-signal IC design tools, such us Cadence or Synopsys
  • Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in nanometric CMOS processes
  • Good knowledge of full-custom analog layout techniques, including the ability to review the work of others.
  • Excellent written and verbal English communication skills

Conditions

  • Salary according to experience
  • Work in our design offices of Madrid (Spain) or Caen (France)