In the course of V5G Days from May 30-31 in València, Spain, and online, Carlos Pardo participated in the panel discussion “The Microelectronics Industry in Europe: Recovery or Reinvention?” He summarized the roundtable: “I very much enjoyed the informative talk with representatives from the Spanish semiconductor industry about PERTE, Strategic Projects for Economic Recovery and Transformation in Spain. KDPOF will soon start mass production of semiconductor packaging and testing in Spain of our own products and third parties ones, thanks to IPCEI (Important Project of Common European Interest) and PERTE.”
Spain had approved the Strategic Projects for Economic Recovery and Transformation with an important invest in microchips and technology companies. It is essential because we have in Spain some companies that create technological and electronic components and equipment but depend on Asia for manufacturing since they don’t have the capacity to produce microchips on their own. The project PERTE will invest an important quantity of Euros to help these companies for manufacturing. As Carlos Pardo stated in the interview, it could get an important growth in these small companies and also attract private invest resulting in a general economic growth.
KDPOF proudly announced that their well-proven KD1053 PHY IC and integrated KD9351 FOT (Fiber Optic Transceiver) have been implemented by Renesas, a premier supplier of advanced semiconductor solutions, into the new next generation automotive vehicle computer VC4. This comprehensive communication gateway ECU from Renesas features the newest automotive network technologies and sufficient computing power to host the ever-increasing number of user applications. “With the VC4, we have integrated an optical Ethernet interface into our automotive evaluation boards for the first time,” stated Tobias Belitz, Principal Engineer at Renesas. “KDPOF shared their 1000BASE-RH transceiver KD1053 and KD9351 FOT according to IEEE 802.3bv with us, which also covers the wide temperature range we are looking at.”
With new challenges like automated driving and electric power trains, In-Vehicle Network (IVN) requirements are quickly evolving. The IVN has to support use cases such as the vehicle data backbone, smart antennas, ADAS cameras/sensors, displays, and data loggers, which demand higher data bandwidth while maintaining the reliability level required by the automotive industry. When considering a standard technology to support the target use cases, it is clear that the requirements are not all met by any existing communication standard, including the optical 10GBASE-SR. It is thus necessary to define a new IVN standard for multi-gigabit optical communications in the automotive environment.
KDPOF congratulates the 802.3cz Task Force for the advance of the proposed IEEE 802.3cz standard to the IEEE 802.3 Working Group ballot stage. “We are happy that the IEEE 802.3 automotive optical multi-gigabit technically complete standard draft has entered the Working Group ballot stage,” stated Carlos Pardo, KDPOF CEO and active participant in the IEEE 802.3 working group. Read more
Tasks and Responsibilities
- Implement ASIC / SoCs / FPGAs for multiple products, starting at the specification & design phase, continuing through technology selection, implementation, and validation. Innovation in performance, power and cost to build the best possible product is a must.
- Participate in all phases of ASIC / FPGA design flow (Synthesis, Place & Route, and Timing Closure) as required.
- Work with backend teams to address any layout and timing issues for ASICs.
- Verification by emulation with FPGAs in the lab.
- Involvement in lead-up, validation, characterization and qualification phases of ASICs.
At the recent CES 2022, Funzin and KDPOF have jointly presented their optical in-vehicle network solution for autonomous vehicles. Funzin, software development and edge AI solution company, have implemented KDPOF’s KD1053 PHY IC and integrated KD9351 FOT (fiber optic transceiver) in the new Funzin AIoT Platform “FAIP 3.0” and Edge AI Device “Photon” for automotive. Read more
Tasks and Responsibilities
- Verify digital logic using SystemVerilog and reusable, standardized methodologies. Verify digital systems that use both custom and standard IP components and interconnects, including microprocessor cores and hierarchical memory subsystems.
- Contribute to verification and modeling at the chip top level.
- Debug tests with design engineers to deliver functionally correct design blocks. Work closely with the design and test teams to define test specifications, verification plans and manufacturing transfer.
Tasks and Responsibilities
- Specification of the analog and mixed signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics …).
- Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes. It means being involved in the full AMS design flow: system-level design, schematic, layout and full verification.
- Definition of layout guidelines for layout engineers and review of their work.
- Collaboration with the test engineers for the testing definition of the fabricated ICs. Review and analysis of lab characterization data for validation and correlation with simulation results.