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KDPOF Contact information

Tasks and Responsibilities

Member of the R&D team in charge of the development of embedded firmware running on the company integrated circuits microprocessors, as well as development of the test programs used in production testing. The responsibilities of the Firmware/Test Engineer also include:

  • Development of the continuous integration tests of the microprocessor firmware during ASIC prototyping.
  • Participate in specification and review of the PCBs used to implement the production testing of the company’s products.
  • Participation on the development of technology evaluation vehicles as well as software development kits.
  • Automatization of laboratory tests and measurements using programming languages like Matlab, TCL, Python.

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Job opening: Senior Mixed-Signal IC Design Engineer

Tasks and Responsibilities

  • Specification of the analog and mixed signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics …).
  • Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes. It means being involved in the full AMS design flow: system-level design, schematic, layout and full verification.
  • Definition of layout guidelines for layout engineers and review of their work.
  • Collaboration with the test engineers for the testing definition of the fabricated ICs. Review and analysis of lab characterization data for validation and correlation with simulation results.

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Tasks and Responsibilities

  • Implement ASIC / SoCs / FPGAs for multiple products, starting at the specification & design phase, continuing through technology selection, implementation, and validation. Innovation in performance, power and cost to build the best possible product is a must.
  • Participate in all phases of ASIC / FPGA design flow (Synthesis, Place & Route, and Timing Closure) as required.
  • Work with backend teams to address any layout and timing issues for ASICs.
  • Verification by emulation with FPGAs in the lab.
  • Involvement in lead-up, validation, characterization and qualification phases of ASICs.

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