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VECS: KDPOF celebrated Proposed IEEE Optical Multi-gigabit Automotive Standard Achieving Milestone

At the recent VECS 2022 – Vehicle Electronics & Connected Services – International Trade Show from May 17 to 18, 2022 in Gothenburg, Sweden, KDPOF has celebrates the in-vehicle network standardization progress reaching the IEEE 802.3 Working Group Ballot stage. “We are happy that the IEEE 802.3cz automotive optical multi-gigabit technically complete standard draft has entered the Working Group ballot stage,” stated Carlos Pardo, KDPOF CEO and active participant in the IEEE 802.3 working group.

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The 802.3cz standard draft for the automotive industry specifies speeds starting at 2.5 Gb/s and going up to 50 Gb/s. The 802.3 Task Force includes numerous individuals affiliated with key carmakers, such as PSA, Toyota, BMW, Ford, GM, and Volvo; Tier 1 suppliers; and components suppliers. These industry leaders have been working on an optical automotive multi-gigabit system that will fulfill the needs of future connected and automated vehicles. “We are very thankful and positive about the strong support from the industry,” added Pardo.

For details about the status of the 802.3cz standard, please see the press release: Proposed IEEE Optical Multi-gigabit Automotive Standard Achieves Milestone

Automotive Multi-gigabit Optical Connectivity

This video about automotive multi-gigabit optical connectivity presents the standardized solution under development by KDPOF to reach a 50 Gb/s bit rate over 40 meters of wiring harness. In the process, we’ll comply with the hardest OEM’s EMC specs, and meeting all automotive requirements in terms of operational temperature, reliability, ageing, mechanical loads, chemical loads, dirtiness and harsh environments in general. And all this with outstanding low power and low cost. Please, follow us to the KDPOF labs and we’ll show you a demo of our multi-gigabit solution: 50 Gb/s optical transmission for automotive.

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Efficient optical technology from KDPOF for safe backbone in vehicles

KDPOF will give insight on “Automotive Communications Standards” at the IEEE Conference “Use of Standards in Industry: IoT, Robotics, Automotive, and Communications” on 20 April 2022 in Madrid, Spain. The IEEE event will discuss the importance of the different standards and their use and impact on the industry in different sectors such as automotive, communications, satellites, etc. In his presentation, Luis Manuel Torres, Principal Engineer at KDPOF and Editor-in-Chief of the IEEE 802.3cz standardization project “Multi-gigabit Optical Automotive Ethernet”, will give a general view of the most important automotive standards, with special emphasis on in-vehicle communication standards.

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Tasks and Responsibilities

  • Implement ASIC / SoCs / FPGAs for multiple products, starting at the specification & design phase, continuing through technology selection, implementation, and validation. Innovation in performance, power and cost to build the best possible product is a must.
  • Participate in all phases of ASIC / FPGA design flow (Synthesis, Place & Route, and Timing Closure) as required.
  • Work with backend teams to address any layout and timing issues for ASICs.
  • Verification by emulation with FPGAs in the lab.
  • Involvement in lead-up, validation, characterization and qualification phases of ASICs.

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Funzin Integrates KDPOF ICs in New Devices “FAIP 3.0” and “Photon” for autonomous vehicles

At the recent CES 2022, Funzin and KDPOF have jointly presented their optical in-vehicle network solution for autonomous vehicles. Funzin, software development and edge AI solution company, have implemented KDPOF’s KD1053 PHY IC and integrated KD9351 FOT (fiber optic transceiver) in the new Funzin AIoT Platform “FAIP 3.0” and Edge AI Device “Photon” for automotive. Read more

EPIC New Product Event Featuring KDPOF’s Integrated KD9351 FOT

At the recent Members New Product Release Event by EPIC (European Photonics Industry Consortium), César Esteban has presented our integrated KD9351 FOT that reduces cost for gigabit connectivity, thus providing efficient optical technology for safe backbone and ADAS sensor links in vehicles.
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Tasks and Responsibilities

  • Verify digital logic using SystemVerilog and reusable, standardized methodologies. Verify digital systems that use both custom and standard IP components and interconnects, including microprocessor cores and hierarchical memory subsystems.
  • Contribute to verification and modeling at the chip top level.
  • Debug tests with design engineers to deliver functionally correct design blocks. Work closely with the design and test teams to define test specifications, verification plans and manufacturing transfer.

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Job opening: Senior Mixed-Signal IC Design Engineer

Tasks and Responsibilities

  • Specification of the analog and mixed signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics …).
  • Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes. It means being involved in the full AMS design flow: system-level design, schematic, layout and full verification.
  • Definition of layout guidelines for layout engineers and review of their work.
  • Collaboration with the test engineers for the testing definition of the fabricated ICs. Review and analysis of lab characterization data for validation and correlation with simulation results.

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Job opening with KDPOF: Electronic Laboratory Technician

Tasks and Responsibilities

You will be in charge of verifying the operation of analog and digital electronic circuits using measurement equipment and analysis and configuration software systems.

  • Execution of tests with different equipment (ATE, oscilloscopes, sources, multimeters protocol/spectrum/network analyzers, microscope, etc.).
  • Operations related to stress tests (use of ovens, preconditioning of parts to be tested, etc.).
  • Preparation of test reports.
  • Laboratory master (keeping things in place, replenishing consumables, etc.).
  • Skill in soldering operations with SMD components.
  • Firmware update tasks, maintenance, and internal checks of laboratory equipment.

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KDPOF Contact information

Tasks and Responsibilities

Member of the R&D team in charge of the development of embedded firmware running on the company integrated circuits microprocessors, as well as development of the test programs used in production testing. The responsibilities of the Firmware/Test Engineer also include:

  • Development of the continuous integration tests of the microprocessor firmware during ASIC prototyping.
  • Participate in specification and review of the PCBs used to implement the production testing of the company’s products.
  • Participation on the development of technology evaluation vehicles as well as software development kits.
  • Automatization of laboratory tests and measurements using programming languages like Matlab, TCL, Python.

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