Specification of the analog and mixed signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics …).
Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes. It means being involved in the full AMS design flow: system-level design, schematic, layout and full verification.
Definition of layout guidelines for layout engineers and review of their work.
Collaboration with the test engineers for the testing definition of the fabricated ICs. Review and analysis of lab characterization data for validation and correlation with simulation results.
