This video about automotive multi-gigabit optical connectivity presents the standardized solution under development by KDPOF to reach a 50 Gb/s bit rate over 40 meters of wiring harness. In the process, we’ll comply with the hardest OEM’s EMC specs, and meeting all automotive requirements in terms of operational temperature, reliability, ageing, mechanical loads, chemical loads, dirtiness and harsh environments in general. And all this with outstanding low power and low cost. Please, follow us to the KDPOF labs and we’ll show you a demo of our multi-gigabit solution: 50 Gb/s optical transmission for automotive.
KDPOF will give insight on “Automotive Communications Standards” at the IEEE Conference “Use of Standards in Industry: IoT, Robotics, Automotive, and Communications” on 20 April 2022 in Madrid, Spain. The IEEE event will discuss the importance of the different standards and their use and impact on the industry in different sectors such as automotive, communications, satellites, etc. In his presentation, Luis Manuel Torres, Principal Engineer at KDPOF and Editor-in-Chief of the IEEE 802.3cz standardization project “Multi-gigabit Optical Automotive Ethernet”, will give a general view of the most important automotive standards, with special emphasis on in-vehicle communication standards.
Tasks and Responsibilities
- Implement ASIC / SoCs / FPGAs for multiple products, starting at the specification & design phase, continuing through technology selection, implementation, and validation. Innovation in performance, power and cost to build the best possible product is a must.
- Participate in all phases of ASIC / FPGA design flow (Synthesis, Place & Route, and Timing Closure) as required.
- Work with backend teams to address any layout and timing issues for ASICs.
- Verification by emulation with FPGAs in the lab.
- Involvement in lead-up, validation, characterization and qualification phases of ASICs.
Tasks and Responsibilities
- Verify digital logic using SystemVerilog and reusable, standardized methodologies. Verify digital systems that use both custom and standard IP components and interconnects, including microprocessor cores and hierarchical memory subsystems.
- Contribute to verification and modeling at the chip top level.
- Debug tests with design engineers to deliver functionally correct design blocks. Work closely with the design and test teams to define test specifications, verification plans and manufacturing transfer.
Tasks and Responsibilities
- Specification of the analog and mixed signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics …).
- Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes. It means being involved in the full AMS design flow: system-level design, schematic, layout and full verification.
- Definition of layout guidelines for layout engineers and review of their work.
- Collaboration with the test engineers for the testing definition of the fabricated ICs. Review and analysis of lab characterization data for validation and correlation with simulation results.
KDPOF has displayed their high-speed connectivity solutions for the communications in vehicle data networks at the IEEE SA Ethernet & IP @ Automotive Technology Days from November 3 to 4, 2021 in Munich, Germany, and online. Optical connectivity perfectly solves the electrical challenges and interference in vehicles thanks to its low weight, low cost, and electromagnetic compatibility due to inherent galvanic isolation. Read more
KDPOF proudly announces that Funzin, software development and edge AI solution company, have integrated their KD1053 IC and integrated KD9351 FOT (fiber optic transceiver) in the new Funzin AIoT Platform “FAIP 3.0” and Edge AI Device “Photon” for automotive. “An automated driving car requires networks capable of controlling and processing a great deal of sensor data,” explained Ms. Deuk Hwa Kim, CEO/President of Funzin. “Our automotive network solution features an Ethernet backbone environment based on plastic optical fiber (POF) to eliminate electronic wave interference.” Read more
At the Members New Product Release Event by EPIC (European Photonics Industry Consortium) on 18 January 2022 at 16:00 CET, César Esteban will present our integrated KD9351 FOT that reduces cost for gigabit connectivity, thus providing efficient optical technology for safe backbone and ADAS sensor links in vehicles.
At the IEEE SA Ethernet & IP @ Automotive Technology Week from November 3 to 4, 2021 in Munich, Germany, and online, KDPOF will display their high-speed connectivity solutions for the communications in vehicle data networks. Optical connectivity perfectly solves the electrical challenges and interference in vehicles thanks to its low weight, low cost, and electromagnetic compatibility due to inherent galvanic isolation.
Together with several industry leaders, KDPOF is working on an optical automotive multi-gigabit system that will fulfill the needs of future connected and automated vehicles. Instead of various port components, the new solution provides a single, complete package. “As the auto industry approaches the 50 Gb/s*m speed-length threshold, the move from copper to optical physical data transmission media is becoming mandatory,” stated Carlos Pardo, CEO and Co-founder of KDPOF. “Optical is the engineering-wise path for higher data rates.” The new connector systems are very small, lightweight and extremely inexpensive compared to the previous ones. With the comprehensive EVK9351AUT evaluation kit, automotive manufacturers and suppliers can already test the new configuration at 1 Gbit/s today. KDPOF thus supports easy project entry into optical gigabit connectivity for a secure Ethernet backbone and ADAS sensor connections in vehicles. Read more