We are hiring a Senior Mixed-signal IC Design Engineer to grow our AMS team. As a member of the mixed-signal design team in the R&D department, you will be a key part in the definition, design and development of the future products of KDPOF. Tasks include:

• Specification of the analog and mixed-signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics…).
• Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in nanometric CMOS processes. It means being involved in the full AMS design flow: schematic, layout and full verification.
• Definition of layout guidelines for layout engineers and review of their work.
• Collaboration with the test engineers for the testing of the fabricated ICs. Review and analysis of lab characterization data for validation and correlation improvement with simulation results.
• Cooperation with the rest of the team to define the characterization tests for the circuits in which the analog and mixed-signal blocks are integrated.
• Cooperation with the system-level engineers for the generation of models of analog and mixed-signal blocks for use in system-level evaluation.
• Assist with the integration of the complete analog subsystem to be used in complex mixed-signal design with integrated digital logic. This will include mixed-signal verification with the digital processing.
• Research on new architectures and efficient solutions for the future products of the company and generation of new patents.
• Internal meeting presentation and documentation of developed work.

Requirements

• Degree/Master/PhD in Electronic Engineering
• At least 5 years of experience in similar tasks
• Experience in delivering successful design in silicon: product definition, characterization, qualification and productization
• Experience on designing full-custom analog IP blocks in sub-nanometric CMOS technology (65nm or below), as well as with analog and mixed-signal IC design tools, such us Cadence or Synopsys
• Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in nanometric CMOS processes
• Good knowledge of full-custom analog layout techniques, including the ability to review the work of others
• Excellent written and verbal English communication skills

Conditions

• Salary according to experience
• Work in our design offices of Madrid (Spain) or Caen (France)

To apply to join the KDPOF team, please send us your CV.